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From: Gy?rgy 'nog' Jeney<nog@s...>
Date: Tue Mar 29 18:13:06 CEST 2005
Subject: [openrisc] [or1ksim #71] Remove useless checks/sim stops
Hi,

This is in preperation for patch #73, which makes the sim command line handling
work with the dynamic recompiler. I have removed runtime.sim.cont_run, which
alerted me to these `issues'. The dma peripheral was checking wether the
address passed to it is aligned but since it registers with a granularity of 4,
it is gauranteed to get an address aligned on a 4 byte boundry thus the check
has been removed.

These peripherals (dma/vga) were halting the sim if a write happened to
one of their reserved registers. I have removed these since it is clearly
documented in their respective documents what happens when that happens.

The vga manual:
"It is not allowed to access reserved memory locations.
No error is generated when these addresses are accessed; all transfers are
terminated normally. Write accesses are ignored, read accesses return all
zeros."

The dma manual:
"All RESERVED bits should always be written with zero. Reading RESERVED bits
will return undefined values."

ChangeLog:
* Remove useless checks.
* Don't halt the sim when not really necessary.

nog.
-------------- next part --------------
diff -urp --unidirectional-new-file /home/nog/or1ksim-split/peripheral/dma.c peripheral/dma.c
--- /home/nog/or1ksim-split/peripheral/dma.c 2005-03-29 17:08:59.000000000 +0200
+++ peripheral/dma.c 2005-03-29 16:51:16.000000000 +0200
@@ -124,13 +124,6 @@ uint32_t dma_read32( oraddr_t addr, void

addr -= dma->baseaddr;

- if ( addr % 4 != 0 ) {
- fprintf( stderr, "dma_read32( 0x%"PRIxADDR" ): Not register-aligned\n",
- addr + dma->baseaddr );
- runtime.sim.cont_run = 0;
- return 0;
- }
-
if ( addr < DMA_CH_BASE ) {
/* case of global (not per-channel) registers */
switch( addr ) {
@@ -142,7 +135,6 @@ uint32_t dma_read32( oraddr_t addr, void
default:
fprintf( stderr, "dma_read32( 0x%"PRIxADDR" ): Illegal register\n",
addr + dma->baseaddr );
- runtime.sim.cont_run = 0;
return 0;
}
} else {
@@ -187,12 +179,6 @@ void dma_write32( oraddr_t addr, uint32_

addr -= dma->baseaddr;

- if ( addr % 4 != 0 ) {
- fprintf( stderr, "dma_write32( 0x%"PRIxADDR", 0x%08"PRIx32" ): Not register-aligned\n", addr + dma->baseaddr, value );
- runtime.sim.cont_run = 0;
- return;
- }
-
/* case of global (not per-channel) registers */
if ( addr < DMA_CH_BASE ) {
switch( addr ) {
@@ -208,7 +194,6 @@ void dma_write32( oraddr_t addr, uint32_
default:
fprintf( stderr, "dma_write32( 0x%"PRIxADDR" ): Illegal register\n",
addr + dma->baseaddr );
- runtime.sim.cont_run = 0;
return;
}
} else {
diff -urp --unidirectional-new-file /home/nog/or1ksim-split/peripheral/vga.c peripheral/vga.c
--- /home/nog/or1ksim-split/peripheral/vga.c 2005-03-29 17:03:37.000000000 +0200
+++ peripheral/vga.c 2005-03-29 16:50:17.000000000 +0200
@@ -72,7 +72,6 @@ void vga_write32(oraddr_t addr, uint32_t
vga->palette[1][addr - VGA_CLUTB] = value & 0x00ffffff;
} else {
fprintf( stderr, "vga_write32( 0x%"PRIxADDR", 0x%08"PRIx32" ): Out of range\n", addr + vga->baseaddr, value);
- runtime.sim.cont_run = 0;
return;
}
break;
@@ -101,7 +100,6 @@ uint32_t vga_read32(oraddr_t addr, void
return vga->palette[1][addr - VGA_CLUTB];
} else {
fprintf( stderr, "vga_read32( 0x%"PRIxADDR" ): Out of range\n", addr);
- runtime.sim.cont_run = 0;
return 0;
}
break;