Message

Reply | Reply all

Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

From: =?unknown-8bit?Q?Gy=F6rgy?= 'nog' Jeney<nog@s...>
Date: Thu Mar 24 21:08:51 CET 2005
Subject: [openrisc] [or1ksim #38] DMA access is not cpu access
Hi,

The dma peripheral was useing set_mem32 and eval_mem32 which is clearly
incorrect, since it should not go through the cache or address be translated by
the mmu. The statistics just so happened to be correct since those functions
were only called from the scheduler but runtime.sim.mem_cycles was reset before
the next instruction was executed. This fixes all of these issues by useing
set_direct32 and eval_direct32 instead.

ChangeLog:
* Useing set_mem32 and eval_mem32 is incorrect. Use set_direct32 and
eval_direct32 instead.

nog.
-------------- next part --------------
diff -urp --unidirectional-new-file /home/nog/or1ksim-split/peripheral/dma.c ./peripheral/dma.c
--- /home/nog/or1ksim-split/peripheral/dma.c 2005-03-22 16:57:30.000000000 +0100
+++ ./peripheral/dma.c 2005-03-06 16:10:42.000000000 +0100
@@ -311,7 +311,9 @@ void dma_channel_clock( void *dat )
}

/* Transfer one word */
- set_mem32( channel->destination, eval_mem32( channel->source, &breakpoint ), &breakpoint );
+ set_direct32( channel->destination, eval_direct32( channel->source,
+ &breakpoint, 0, 0 ),
+ &breakpoint, 0, 0 );

/* Advance the source and destionation pointers */
masked_increase( &(channel->source), channel->source_mask );
@@ -343,7 +345,7 @@ void dma_channel_clock( void *dat )
void dma_load_descriptor( struct dma_channel *channel )
{
int breakpoint = 0;
- unsigned long desc_csr = eval_mem32( channel->regs.desc + DMA_DESC_CSR, &breakpoint );
+ unsigned long desc_csr = eval_direct32( channel->regs.desc + DMA_DESC_CSR, &breakpoint, 0, 0 );

channel->load_next_descriptor_when_done = !TEST_FLAG( desc_csr, DMA_DESC_CSR, EOL );

@@ -354,11 +356,11 @@ void dma_load_descriptor( struct dma_cha

SET_FIELD( channel->regs.sz, DMA_CH_SZ, TOT_SZ, GET_FIELD( desc_csr, DMA_DESC_CSR, TOT_SZ ) );

- channel->regs.a0 = eval_mem32( channel->regs.desc + DMA_DESC_ADR0, &breakpoint );
- channel->regs.a1 = eval_mem32( channel->regs.desc + DMA_DESC_ADR1, &breakpoint );
+ channel->regs.a0 = eval_direct32( channel->regs.desc + DMA_DESC_ADR0, &breakpoint, 0, 0 );
+ channel->regs.a1 = eval_direct32( channel->regs.desc + DMA_DESC_ADR1, &breakpoint, 0, 0 );

channel->current_descriptor = channel->regs.desc;
- channel->regs.desc = eval_mem32( channel->regs.desc + DMA_DESC_NEXT, &breakpoint );
+ channel->regs.desc = eval_direct32( channel->regs.desc + DMA_DESC_NEXT, &breakpoint, 0, 0 );
}