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Message
From: =?unknown-8bit?Q?Gy=F6rgy?= 'nog' Jeney<nog@s...>
Date: Tue Jan 25 15:48:19 CET 2005
Subject: [openrisc] [or1ksim #3] Warning fixes for insnset.c and execute.c
On 0, Matjaz Breskvar <phoenix@o...> wrote:
> I've been looking over the patches you sent. Everything looks
> nice (provided it doesn't break other stuff, but we'll see that later),
> just the big generate.c patch in previous email is not obvious to me.
Could you elaborate abit more? I don't understand what your trying to say. You
mean I shouldn't need to change insnset.c? Or are you talking about the
destination operand stuff?
> Is it right to assume that the net effect of all the patches is:
> - rD is always destination operand. the code now relies upon
> this. ie. there can always be at most one destination register, when
> before this wasn't neccessery (i know it's not needed for now). the gain
> is faster simulator execution. (would you happen to have any esstimate?)
I have done this because I removed the eval_openrand{8,16,32} and the
instructions themselves do the set_mem{8,16,32} after my patches. Is it
forseable that there shall be multiple destination operands for some
intructions (I haven't check the vector instructions)?
> - cleanups/warnings elimination
For now that's basically it. I'm doing all this cleanup work to be able to bolt
my dynamic recompiler into or1ksim. In a dynamic recompiler it becomes rather
obvious the amout of stuff that has to be done to execute 1 instruction and I'm
just reduceing that number. I don't actually have any benchmarks.
>
> If this is so i say let's commit the changes and cross our finger
> it doesn't break anything. ;)
Hope so...
nog.
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