LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Find Resources
  • Job Opportunity
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Openrisc > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: Giacomo Bernardi<bernardi.giacomo@t...>
    Date: Wed Jan 12 16:16:56 CET 2005
    Subject: [openrisc] An advice
    Top
    I'm planning to buy XSA-3S1000 for synthesizing openrisc-1100 ( or 1200 ) and
    do some experience. Are there any contraddiction ( like that the external
    memory on board is only 16 bit adressable ) ?
    If not, is there anyone that knows what area occupation it have in that
    FPGA?
    And wich clock frequency is obtainable?
    For implementing openrisc is better a Spartan FPGA, a Virtex2 or is it
    indifferent ( beetween the Xilinx architectures ) ?

    Thanks in advance.
    Regards Giacomo

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.