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From: danny.p.baumann@w...<danny.p.baumann@w...>
Date: Tue Oct 5 14:16:09 CEST 2004
Subject: [openrisc] OR1200 stalls on Load/Store instructions
Hi,

today I have the following question:

I have successfully implemented a SoC based on OR1200 with the
memory controller written by Rudolf Usselmann. I can access the
memory in GDB (read and write) and can execute simple code.
But I have one problem: The CPU (and debugging via GDB and JTAG)
stall on execution of every Load/Store operation (e.g. l.sw, l.sh, l.lwz).
I can read and write the memory referenced in GDB, so that shouldn't be
the problem.

Does anyone know what could cause this? Or - even better - what
could solve it?

Thank you!

Danny