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Message
From: Phil Endecott<spam_from_openrisc@c...>
Date: Mon Oct 4 01:19:38 CEST 2004
Subject: [openrisc] 150MHz or 300MHz?
Dear OpenRisc people,Allow me to introduce myself. I'm Phil Endecott; a while ago I designed
the JCN microprocessor <http://www.uk.research.att.com/jcn/> and in the
more distant past I was involved with the AMULET asynchronous ARMs
<http://www.cs.man.ac.uk/apt/projects/processors/amulet/>.
Since then I've been doing totally different stuff including a hardware
VNC encoder <http://www.addertec.com/products/remote_ip/
adderlink_ip.html>, an open-source mail server <http://decimail.org/>,
and genealogy software <http://treefic.com/>. But I have recently got
interested in processors again as a couple of people have asked me my
opinion of OpenRISC (and OPENCORES in general).
In particular, one group I know have a plan to build an ASIC to replace
a board that currently includes a 266 MHz Xscale. Getting that sort of
performance in an ASIC, preferably in 0.18um rather than 0.13, is quite
a challenge, don't you think?
So how fast can you go? On the web page you don't seem to be very sure...
"When implemented in a typical 0.18u 6LM process it should
provide over 300 dhrystone 2.1 MIPS at 300MHz"
....
"Synthesis for 0.18u UMC using Virtual Silicon libraries
produces 25000 gates design with area of 0.5mm2. Post
layout worst case timing is 150MHz."
So which is it, 150 MHz or 300 MHz ???
Good luck with everything. You could be about to change the landscape
of the ASIC world. Lots of people are watching....
--Phil.
p.s. You might also like to have a look at the "Flextronics
Semiconductor SOC" link on the OR1200 page to
http://www.opencores.org/projects.cgi/web/or1k/Silicon which seems to be
broken.
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