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Message
From: verno@a...<verno@a...>
Date: Fri Jul 23 17:25:59 CEST 2004
Subject: [openrisc] jp1 server
Dear All,
I try to implement a little SoC to a MEMEC board with Virtex xcIIv1000. I use the
ORP base verilog code. I chopped so many modules. On my Soc there is the
or1k, debug unit, uart and cop matrix. I tried to communicate throu the jp1 server
but unfortunately a I couldn't. I get this message : Connected to parallel port at 378
I read the forum in same subject and found that: I have to check the jtag
connection. I have done it but the problem hasen't solved yet. I connect the debug
unit jtag port to the jtag unit which is on the paralel cable. I checked the signals
with an oscilloscope there are on the jtag unit pins. I hope these signals are correct
and timing is ok.
On the board there is a 24MHz clock and I use it as input clk. This frequency is
good or too high?
On my jtag module there isn't trst signal. Is it necessary to the connection or is it
enough to put it to a switch on the board and push before the server starts?
If I use just some modules (or1k,debug unit, uart, cop matrix) the jp1 server could
communicate the Soc?
How can I check the jtag unit pin signals are correct, what I have to watch on the
oscilloscop in each pin?
If somebody could anwser my questions thanks a lot.
Erno Varga
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