OPENCORES.ORG

From: Luís Vitório Cargnini<vitorio@d...>
Date: Tue Jul 6 15:23:27 CEST 2004
Subject: [openrisc]but, still...I have a problem.

Hi, do you have another synthesiser than XST ?? Leonardo Spectrum, Mentor Precision ? Can you try it? Second try to use icarus verilog it could help. Icarus can generate EDIF file. Ohh and it's free. my E$ 0,02 On Tue, 2004-07-06 at 09:44, Victor wrote: > Hello, > > it looks to me like apparently your FPGA won't work with the > implementation you are trying to fit in it, have you tried what Kim > said about turning off both caches? Anyways there is an issue I've > noticed while working with Xilinx 6.1i, apparently there are some FPGAs > that have been incorrectly described in the program, for instance, I > had an FPGA with 28 Block RAMs but Xilinx kept saying that my FPGA had > only 10 (which made me read up and down the datasheets till I found out > the truth) so I guess you've got these two options: > > a) do what Kim said --> turn off caches > b) try the lucky shot and see if your FPGA indeed has enough BRAMs > but your ISE version is not reporting it right, case in which I'd > recommend you to update your ISE. > > Anyways, if it doesn't fit, then it doesn't fit. Regards, > > Victor Lopez > > > Hello Kim. > > > > I tried again to your method. > > IC/DC size 8KB -> 4KB > > but, it's not changed. > > still~ > > Number of Block RAMs: 57 out of 28 203% (OVERMAPPED) > > > > why?! > > > > thank you. > > > > > > ----- Original Message ----- > > From: hy kim<boina9456@h...> > > To: > > Date: Tue Jul 6 04:01:13 CEST 2004 > > Subject: [openrisc]I have a problem. > > > > > psungil@n... wrote: > > > > > > >Hi~ All. > > > >I have a problem at openrisc synthesis. > > > >It's not make a bit file withe xilinx ISE 6.1i. > > > >look at a below. > > > >It's a report of Xilinx. > > > > > > > >Number of Block RAMs: 57 out of 28 203% (OVERMAPPED) > > > > > > > >please, tell me about how to make a fit in FPGA's area. > > > > > > > > > > > > > > > >below~!! > > > >--------------------------------------------------------------- > > > >Release 6.1i Map G.26 > > > >Xilinx Mapping Report File for Design 'xsv_fpga_top' > > > > > > > >Design Information > > > >------------------ > > > >Command Line : C:/Xilinx/bin/nt/map.exe -intstyle ise -p > > > xcv800-hq240- > > > >4 -cm > > > >area -pr b -k 4 -c 100 -tx off -o xsv_fpga_top_map.ncd > > > >xsv_fpga_top.ngd > > > >xsv_fpga_top.pcf > > > >Target Device : xv800 > > > >Target Package : hq240 > > > >Target Speed : -4 > > > >Mapper Version : virtex -- $Revision: 1.16 $ > > > >Mapped Date : Tue Jul 06 09:05:45 2004 > > > > > > > > > > > >Design Summary > > > >-------------- > > > >Number of errors: 1 > > > >Number of warnings: 31 > > > >Logic Utilization: > > > > Total Number Slice Registers: 4,756 out of 18,816 25% > > > > Number used as Flip Flops: 4,724 > > > > Number used as Latches: 32 > > > > Number of 4 input LUTs: 11,426 out of 18,816 60% > > > >Logic Distribution: > > > > Number of occupied Slices: 7,682 out of 9,408 81% > > > > Number of Slices containing only related logic: 7,682 out of > > > 7,682 > > > >100% > > > > Number of Slices containing unrelated logic: 0 out of 7,682 > > > >0% > > > > *See NOTES below for an explanation of the effects of > > > unrelated > > > >logic > > > >Total Number 4 input LUTs: 12,730 out of 18,816 67% > > > > Number used as logic: 11,426 > > > > Number used as a route-thru: 248 > > > > Number used for Dual Port RAMs: 1,056 > > > > (Two LUTs used per Dual Port RAM) > > > > Number of bonded IOBs: 152 out of 166 91% > > > > IOB Flip Flops: 94 > > > > Number of Tbufs: 576 out of 9,632 5% > > > > Number of Block RAMs: 57 out of 28 203% (OVERMAPPED) > > > > Number of GCLKs: 3 out of 4 75% > > > > Number of GCLKIOBs: 3 out of 4 75% > > > > > > > >Total equivalent gate count for design: 1,129,206 > > > >Additional JTAG gate count for IOBs: 7,440 > > > >Peak Memory Usage: 193 MB > > > >_______________________________________________ > > > >attachment.bin > > > > > > > > > > > > > > > you can try to do the following work for fix > > > 1) reduce cache size to 4KB > > > 2) or disable cache (inst/data) > > > it can perform with a file 'or1200/or1200_defines.v' > > > best regards > > > hy kim > > > > > > > > _______________________________________________ > > attachment.bin > > > > > > > _______________________________________________ > attachment.bin -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 189 bytes Desc: This is a digitally signed message part Url : attachment.bin

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[openrisc]but, still...I have a problem. Victor