LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Find Resources
  • Job Opportunity
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Openrisc > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: zhustudio<zhustudio@i...>
    Date: Mon Jun 14 11:29:48 CEST 2004
    Subject: [openrisc] about area on OR1K
    Top
    Hi all,

    How about the area with 0.18um technology?
    and how about the cache size and mmu existence?

    Flextronics has use this core to implement with UMC 0.18um.

    Thanks

    Richard zhu

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.