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Message
From: whli_interqos@y...<whli_interqos@y...>
Date: Tue Jun 8 04:37:18 CEST 2004
Subject: [openrisc] the following instructions are generated by gcc?
Hi all,
I wrote an assembly code for the following instructions individually.
And I ran the program in the simulator, I found that the simulator
aborted abnormally.
l.addc
l.rori
l.srai
l.lws
I wonder if they are supported by the simulator and generated by the
gcc compiler?
Thank you very much.
Regards,
Stephen
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