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Message
From: Ben A. Abderazek<ben@s...>
Date: Wed May 26 23:48:53 CEST 2004
Subject: [openrisc] Logic Number from Net list
Hi,
I am using FPGA compiler II to generate net list of a Verilog module.
The module can be compiled without any error and I can find the Est. Frequency from the optimized chips.
I want to know is it possible to know also the number of gates?
If it is not possible, is there are any additional or other tools i can use to find the number of gates of a synthesized module.
Regards,
Ben
IS-N
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