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    Navigation: All forums > Openrisc > Message List > Message Post

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    From: Victor<victor.lopez@a...>
    Date: Fri May 14 17:15:36 CEST 2004
    Subject: [openrisc] What information should be pushed to the Stack for Call Instruction?
    Top
    Hello,

    I guess you are not talking either about the OpenRISC in this
    question so the answer to your questions depends very much on what do
    you want your processor to be able to do. But in any case I guess you
    should look for its being able to resume execution perfectly, if your
    way of jumping is through a "call" instruction which obviously has to
    save the return address it is up to you if it should save any other
    thing. OpenRISC does save the Status Register in case of exceptions,
    for instance, and as such l.rfe instruction puts back the PC and SR
    prior to the exception. Usually, it is up to the software to save
    things like the other registers, but that is defined by the "calling
    convention" which you should define for your processor. If we are
    talking about your status register then you should decide if you want
    it to be saved or not, it depends on the way you execute exceptions and
    such, because you can always have the software doing it for you...
    Everything is up to you, but a good rule of thumb is: the simpler you
    make it in hardware the more complex will be the software. A RISC takes
    many more instructions than a CISC to execute some algorithm but the
    thing is that the RISC is so fast because of its simpleness that it
    outdoes the CISC. I would recommend you to think about an architecture
    and then start "working against it" by translating programs, by hand,
    into your assembler code and "executing on paper" that code so you can
    see if it is really worth it or if you should better modify certain
    things, but always have in mind what the purpose of your processor is
    going to be... I mean, if you want to play a tiny Linux on it then you
    should start looking at its internals before even thinking about
    condition codes. That is... maybe for a custom application it is not
    mandatory to check for, let's say Overflow in operations (with this I
    am also answering your other email) and maybe you don't even need to
    set flags like the carry after an addition but if you are planning to
    run something more serious... then it is better to start reading some
    more literature... Anyways in order to get right opinions I think it
    would be better if you could explain a bit more your questions, your
    other email of today I couldn't understand completely what you meant,
    but maybe it was my fault ;). Best regards and good luck,

    Victor Lopez

    > Dear Helper,
    >
    > When "call" instruction is executed (or earlier decoded), I know
    that the return address should be pushed to a stack (stack-register)
    if more that a call will be needed.
    > My question is do I also have to push the condition code register (N,
    Z,V, and C) and then pop them again with the return address when return
    from call (rfc) instruction is executed or I just push the return
    address (the PC of the call + 2 for 16-bit processor).
    > I am thinking to push only the return address to the stack-register
    during call and I push the "ra" and CCR flags for interrupt only.
    >
    > Many thanks,
    > /Ben
    > UEC, IS
    >




     
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