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From: Damjan Lampret<damjanl@o...>
Date: Sat May 15 00:52:07 CEST 2004
Subject: [openrisc] 1 bit condition code register
Actually, I was doing a lot of analysis in 1999 looking at the Alpha model
and comparing it to the traditional model of flags. If you remember at the
time I defined only one true flag and that is "F" flag; the one set by sfXX
instructions. Everything else like CY came later and these are not real
flags... The alpha model doesn't have much advantage.

regards,
Damjan

----- Original Message -----
From: "Johan Rydberg" <jrydberg@g...>
To: "List about OpenRISC project" <openrisc@o...>
Sent: Friday, May 14, 2004 11:48 AM
Subject: Re: [openrisc] 1 bit condition code register


>
> On Fri, 14 May 2004, kavi wrote:
>
> : As the developers state, this permits for higher performance in terms of
> : cycle time
> : as well as deeper pipelines.
>
> That might very well be true, but I'm afraid that it's a bit too late
> to change the OpenRISC 1000 ISA.
>
> ~j
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc
>