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Message
From: kavi<nkavv@s...>
Date: Fri May 14 11:22:45 CEST 2004
Subject: [openrisc] 1 bit condition code register
Dear friends,i recall the example of the DEC Alpha, e.g. the 21264 architecture. It has no condition code register, all compares return result in a register.
General-purpose registers are also read in conditional move instructions.
As the developers state, this permits for higher performance in terms of
cycle time
as well as deeper pipelines.
Nikolaos Kavvadias
nkavv@s...
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