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Message
From: Ben A. Abderazek<ben@s...>
Date: Thu May 13 05:43:49 CEST 2004
Subject: [openrisc] 1 bit condition code register
Hello,I have a Question about Condition code register.
known cc code have Z, N, V and C flags and most instructions have to set these bits.
ASAIK, this ways was used to ease branching and testing.
I am designing a new processor and I want to know what are the performance drawbacks in hardrware and the complicatiosn in software (compiled programs) if I implement a 1 bit cc code register and I let only compare instructions set the above bit. Branch instruction check that bit and the change the program flow according to the branch type.
Note: I just care about branch instructions for the time being.
Many thanks for your help
/Ben
UEC,IS
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