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Message
From: "Robert Cragie" <rcc@j...>
Date: Wed, 12 Nov 2003 09:41:12 -0000
Subject: RE: [openrisc] More information on optimisation problem
I've misinterpreted the l.addi instruction, please ignore the previous
e-mail on this topic. I am definitely confused now! :-(
Robert Cragie, Design Engineer
_______________________________________________________________
Jennic Ltd, Furnival Street, Sheffield, S1 4QT, UK
http://www.jennic.com Tel: +44 (0) 114 281 2655
_______________________________________________________________
> -----Original Message-----
> From: owner-openrisc@o...
> [mailto:owner-openrisc@o...]On Behalf Of Robert Cragie
> Sent: 12 November 2003 08:48
> To: OpenRISC
> Subject: [openrisc] More information on optimisation problem
>
>
> I have been investigating the problems I have been having with compiler
> optimisation and found this specific one. It does seem to be
> concerned with
> conditional branches, which I know has been mentioned before. Is anybody
> actively maintaining the toolchain and is this likely to be fixed in the
> near future?
>
> I am using GCC 3.2.3 and binutils from OpenCores CVS site.
>
> Comments are places after the instructions they refer to.
>
> Optimised (-O)
> --------------
>
> 13d0: 1a 40 ff ff l.movhi r18,0xffff
> 13d4: aa 52 00 04 l.ori r18,r18,0x4
> # 0xffff0004 into r18
>
> 13d8: 85 d2 00 00 l.lwz r14,0x0(r18)
> # *(r18 == 0xffff0004) into r14
>
> 13dc: 18 e0 00 08 l.movhi r7,0x8
> 13e0: a8 e7 00 00 l.ori r7,r7,0x0
> # 0x00080000 into r7. Note wasteful second opcode is a nop
>
> 13e4: e0 8e 38 03 l.and r4,r14,r7
> # r4 = r14 & r7
>
> 13e8: 9c 60 00 00 l.addi r3,r0,0x0
> # **** This seems to be a bizarre opcode to use.
> # **** What's supposed to be in r3? This is adding 0 to whatever
> # **** happens to be in r3, which is indeterminate in this scope
>
> 13ec: e4 04 18 00 l.sfeq r4,r3
> # Comparison of r4 and r3 - but r3 contains rubbish
>
> 13f0: 13 ff ff fa l.bf 13d8 <_cyg_start+0x3c>
> 13f4: 15 00 00 00 l.nop 0x0
> # Branch
>
> Non-optimised
> -------------
>
> 1420: 18 60 ff ff l.movhi r3,0xffff
> 1424: a8 63 00 04 l.ori r3,r3,0x4
> # 0xffff0004 into r3
>
> 1428: 84 63 00 00 l.lwz r3,0x0(r3)
> # *(r3 == 0xffff0004) into r3
>
> 142c: d7 e2 1f e8 l.sw 0xffffffe8(r2),r3
> # Store r3 on stack
>
> 1430: 84 62 ff e8 l.lwz r3,0xffffffe8(r2)
> # Retrieve from stack into r3
>
> 1434: 18 a0 00 08 l.movhi r5,0x8
> 1438: a8 a5 00 00 l.ori r5,r5,0x0
> # 0x00080000 into r7. Note wasteful second opcode is a nop
>
> 143c: e0 83 28 03 l.and r4,r3,r5
> # r4 = r3 & r5
>
> 1440: 9c 60 00 00 l.addi r3,r0,0x0
> # **** This seems to be a bizarre opcode to use.
> # **** This works in this case as it's adding 0 to r3, which
> # **** happens to be correct but only incidentally, I would say
>
> 1444: e4 04 18 00 l.sfeq r4,r3
> # Comparison of r4 and r3 - r3 is OK here
>
> 1448: 13 ff ff f6 l.bf 1420 <_cyg_start+0x44>
> 144c: 15 00 00 00 l.nop 0x0
> # Branch
>
> Robert Cragie, Design Engineer
> _______________________________________________________________
> Jennic Ltd, Furnival Street, Sheffield, S1 4QT, UK
> http://www.jennic.com Tel: +44 (0) 114 281 2655
> _______________________________________________________________
>
>
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