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Message
From: Micron@w... (r90048@c...)
Date: Mon, 10 Nov 2003 02:29:34 +0100
Subject: [openrisc] Question about "load from memory"
Hi,
I'm a student who tries to understand the operation of this processor.
I traced the exection of an instruction 'lws' and found that the address
of destination register 'rf_addrw' is ready one cycle before data reading
from memory, i.e., dataw[31:0]. Does the loading operation write data
into the correct register?
Suppost that there's no D-cache miss and the accessing time is one
cycle.
Micron.
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