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Message
From: "Damjan Lampret" <lampret@o...>
Date: Mon, 3 Nov 2003 16:17:49 +0100
Subject: Re: [openrisc] Vector half-word elements mutliply add signed saturated description
Hey !
Vector stuff is not implemented yet anywhere so it is a matter of
discussion.
regards,
Damjan
----- Original Message -----
From: "James A. Morrison" <ja2morri@c...>
To: <openrisc@o...>
Sent: Sunday, November 02, 2003 10:17 PM
Subject: [openrisc] Vector half-word elements mutliply add signed saturated
description
> Hi,
>
> In the description of lv.madds.h it says that each intermediate
> result is added to the corresponding signed half-word of VMAC.
> However, in the 64-bit implementation description is has VMAC
> being made up of 2 64 bit registers which get filled in 32 bits
> at a time. So is VMAC made up of word (32 bit) or half-word
> (16 bit) elements for this instruction?
>
> Jim
>
>
>
>
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