LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Find Resources
  • Job Opportunity
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Openrisc > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: Marko Mlinar <markom@o...>
    Date: Tue, 28 Oct 2003 09:44:10 +0200
    Subject: Re: [openrisc] Simulator ORC
    Top

    On Saturday 25 October 2003 19:19, christian@m... wrote:
    > Hello,
    >
    > I have installed the architectural simulator.  I follow the README
    > instructions in order to install uClinux on simulator.  It seems working
    > because I can output data message into uart0.tx (command less
    > uart0.tx) file : or32-uclinux-sim -f sim.cfg linux.  But i don't see
    > anything in the second file uart0.rx.  What can I do to correct it?
    Christian,
    
    you need to write something in that file during the simulation in order for 
    uart to get some characters.
    
    > Is it correct that i cannot run the testbench simulator?
    what do you mean by testbench simulator?
    
    
    > By typing 'make all check' (or1ksim/testbench), many errors occur.
    >
    > Also, I would like to get some example in order to use the simulator.
    > Like run some programs on this simulator.
    
    simply load the elf/coff file by passing it as a parameter.
    Then write help for a list of commands.
    
    Marko
    
    
    
    
    
    

    ReferenceAuthor
    [openrisc] Simulator ORCChristian

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.