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Message
From: "Damjan Lampret" <lampret@o...>
Date: Thu, 28 Aug 2003 19:24:24 +0200
Subject: Re: [openrisc] Wishbone example and driver writing for uCLinux wishbone cores.
Hi !
Look at one of the IP cores that is WISHBONE compliant. To name a few:
or1200, pci, ethernet, uart16550, ac97 etc.
WISHBONE is transparent to software. Your software is the same regardless if
you use WISHBONE as interconnect, or some other bus interconnect.
regards,
Damjan
----- Original Message -----
From: "Brian Korsedal" <BKorsedal@b...>
To: <openrisc@o...>
Sent: Thursday, August 28, 2003 5:51 PM
Subject: [openrisc] Wishbone example and driver writing for uCLinux wishbone
cores.
> Hi,
>
> Is there an example implimentation of the Wishbone architecture? What has
> to be done to make a core Wishbone compatible?
>
> Also, Is there any manual on how to write drivers for cores on the
Wishbone
> bus? I've never written Linux drivers before.
>
> Thank you,
>
> Brian
>
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