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Message
From: Dries Driessens <ddr@d...>
Date: Tue, 26 Aug 2003 16:59:02 +0200
Subject: Re: [openrisc] First hardware steps
Brian,
thank you for your advice!
Although I correctly added the .ucf file (included in the xess directory
of OR1K), ISE constraint editor doesn't seem to understand the syntax.
(i.e.: NET "rstn" LOC = "P174"; )
Strange!
But, anyway now I know where to look!
Best regards,
Dries
Brian Adams wrote:
> Dries,
>
> I don't use the XESS board for our SOC, but I suspect part of your
> problem is with this:
>
> " Number of LOCed External IOBs 0 out of 152 0%"
>
> Somewhere you must have a .ucf that defines that pad locations for
> your chip. Unfortunately I don't know anything about the XESS setup, so
> I can't help you find it.
>
> Also, the 2 minutes sounds about right for your system.
>
> Hope that helps,
> Brian
>
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