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Message
From: "Damjan Lampret" <lampret@o...>
Date: Tue, 19 Aug 2003 21:17:07 +0200
Subject: [openrisc] Fw: ORP_SOC hardware verification env.
This might be interesting for some of you if you have similar problems
regards,
Damjan
> >----- Original Message -----
> >From: "Avinash Mani"
> >To:
> >Sent: Tuesday, August 19, 2003 1:58 AM
> >Subject: Re: ORP_SOC hardware verification env.
> >
> >
> > >
> > > Hello Damjan,
> > > Thanks a lot for the suggestion. The ATS buils script indeed worked
for
> > > me. I was not able to compile the gcc which I got as as tarball from
> >cvsget
> > > but using the ATS script to checkout and compile the gcc worked well.
I
> > > appreciate all the help I got from you. Thanks a lot.
> > >
> > > regards,
> > > Avinash
> > >
> > >
> > > >From: "Damjan Lampret"
> > > >To: "Avinash Mani"
> > > >Subject: Re: ORP_SOC hardware verification env.
> > > >Date: Mon, 18 Aug 2003 23:22:47 +0200
> > > >
> > > >I think you are doing something wrong with the build. You need to be
very
> > > >careful not to make any shortcuts, make sure you clean build
directories
> > > >etc. Can't offer exact soluation to the problem, but what I do know
is if
> > > >you try the ATS script to build it, it should work. At least it works
on
> > > >the
> > > >ATS build machine.
> > > >
> > > >Proof: http://www.opencores.org/projects/or1k/ATS
> > > >
> > > >Script is available on the ATS page. Build logs available as well.
> > > >
> > > >regards,
> > > >Damjan
> > > >
> > > >----- Original Message -----
> > > >From: "Avinash Mani"
> > > >To:
> > > >Sent: Monday, August 18, 2003 10:46 PM
> > > >Subject: Re: ORP_SOC hardware verification env.
> > > >
> > > >
> > > > >
> > > > >
> > > > > Hi Damjan,
> > > > >
> > > > > I am not sure if you got my earlier message. I have been having
some
> > > >problems with my internet connection. In any case, I wanted to thank
you
> > > >very much for you quick response. Yes I had noticed that build the ws
> >stuff
> > > >would be the best way to get more complex flash.in files for further
> > > >verification. I had another question for you. This is related to the
> > > >gcc-3.1
> > > >tar ball that I got from or1k/gcc-3.1
> > > > >
> > > > > I was following the instructions to compile and install gcc from
here
> > > >and
> > > >I have already installed the binutils. I ran into a problem during
the
> >gcc
> > > >compilation when the installation reached the gcc/config/or32/
> >subdirectory
> > > >and tried to compile the machine code in the file or32.S The xgcc
parser
> > > >complained about the mneumonic that was used for the instructions in
this
> > > >file. It complained about the "." that was used in the instruction
names.
> > > > >
> > > > > I was confused. It almost seems like the estension to the gcc
> >parser
> > > >that is required to understand the or32 instructions is missing from
this
> > > >tree. The initial gcc compilation seemed to go through fine till the
> > > >installation reached this directory. Do you have any ideas on this.
> >Please
> > > >let me know who is the best person to contact for this.
> > > > >
> > > > > So currently I am stuck trying to compile the gcc-3.1 source that
I
> > > >got
> > > >from opencores. Your help in this matter is greatly appreciated.
> > > > >
> > > > >
> > > > >
> > > > > regards,
> > > > >
> > > > > Avinash
> > > > >
> > > > >
> > > > >
> > > > > >From: "Damjan Lampret"
> > > > > >To:
> > > > > >Subject: Re: ORP_SOC hardware verification env.
> > > > > >Date: Mon, 18 Aug 2003 07:02:59 +0200
> > > > > >
> > > > > >Yes you need to install GNU toolchain for openrisc. Once you have
it
> > > > > >installed, look into one of the SW test cases in
> >or1k/orp/orp_soc/sw/*
> > > >and
> > > > > >see how Makefile is written. To prepare a flash file for running
in
> > > > > >simulation it uses several utilities from
or1k/orp/orp_soc/sw/utils
> >and
> > > >then
> > > > > >simulation script copies the final file into flash.in.
> > > > > >
> > > > > >regards,
> > > > > >Damjan
> > > > > >
> > > > > >----- Original Message -----
> > > > > >From:
> > > > > >To:
> > > > > >Sent: Sunday, August 17, 2003 9:24 PM
> > > > > >Subject: ORP_SOC hardware verification env.
> > > > > >
> > > > > >
> > > > > > >
> > > > > > > Hello,
> > > > > > > I have downloaded the or1k/orp/orp_soc subdirectory and have
been
> > > > > > > able to run some basic simulations for hardware verification
of
> >the
> > > > > > > OR1200 CPU core using the testbench and the the flash.in
memory
> > > >file.
> > > > > > > I wanted to be able to generate more complex tests and
therefore
> > > > > > > wanted to know how I can generate these flash.in files for
more
> > > > > > > complex programs that I would like to write for the OR1200
core
> >and
> > > >in
> > > > > > > general the ORP_SOC environment.
> > > > > > > I have downloaded the gnu toolchain and am currently compiling
it.
> > > >Is
> > > > > > > this the right direction to go in? Basically I want to be able
to
> > > >write
> > > > > > > programs for the ORP and compile them into the microcode that
can
> >be
> > > > > > > loaded into the flash for hardware verification.
> > > > > > > If there are more complex existing programs could you please
point
> > > > > > > me to them. Your help is appreciated.
> > > > > > >
> > > > > > > regards,
> > > > > > > Avinash
> > > > > >
> > > > >
> > > > >
> > > > >
> > >
> >
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