LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Find Resources
  • Job Opportunity
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Openrisc > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: "Damon Brantley" <brantley@m...>
    Date: Fri, 25 Jul 2003 07:27:07 -0500
    Subject: Re: [openrisc] uclinux ram model in or1k sim.
    Top

    I will try the build scripts from ATS this evening to see if there is any
    difference, but I notice 
    the build is done using CONFIG_ROMKERNEL. For my hardware, I will be
    loading memory directly so I do not
    want to load from flash.
    
    Maybe I am misunderstanding what CONFIG_ROMKERNEL means. Looking at the
    code(head.S __flsh_start), it looks like 
    CONFIG_ROMKERNEL will cause the kernel to be loaded into RAM from flash.  
    In my case I am using CONFIG_RAMKERNEL which bypasses flsh_start for the
    most part and goes to start_kernel.
    Also ram.ld gets used  in the CONFIG_RAMKERNEL case.
    
    The build did have problems for me with CONFIG_RAMKERNEL. I did have to
    modify a file because of a link error.
    It was ramvec or ramvec_start. I can not remember which file. 
    
    I am just trying to get some ideas for the weekend, since this list pretty
    much goes dormant on the weekend. 
    I guess everyone else has a life.:-)
    
    Regards,
    Damon
    
    At 07:57 AM 7/25/2003 +0200, you wrote:
    >On Friday 25 July 2003 05:36, Damon Brantley wrote:
    >> I am attempting to simulate uclinux in or1k sim. I will be loading the
    >> image directly into ram,
    >> so I am using the ram model. The problem I am running into is the kernal
    >> hangs at serial.c line 411.
    >>
    >> I did make some changes to the ram.ld to accomodate the size of the binary,
    >> but nothing that should be
    >> interfereing with the UART memory locations. The memory is readable and
    >> shows data present. I also
    >> made a few changes to the sim.cfg because of the kernel not appearing in
    >> memory at all.
    >>
    >> I was able to successfully run the rom model in the simulator.I did notice
    >> in the rom model though, the simulator
    >> would print warnings about nonwritable memory locations when accessing ROM
    >> memory. I do not see this
    >> in the ram model. Also in the rom model, unaccessed UART memory locations
    >> showed unknowns (xx) instead of values.
    >> I saw hex values for all locations in the ram model
    >>
    >> Has anyone else run the uclinux in the ram model in the or1k with success?
    >Very likely you have done something wrong.
    >
    >See ATS page under or1k projects on opencores.org, where tools and uclinux 
    >builds daily. There are also scripts how to build everything.
    >
    >Marko
    >
    >
    >
    >
    
    
    
    

    ReferenceAuthor
    [openrisc] uclinux ram model in or1k sim.Damon Brantley
    Re: [openrisc] uclinux ram model in or1k sim.Marko Mlinar

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.