|
Message
From: "Damjan Lampret" <lampret@o...>
Date: Thu, 17 Jul 2003 14:37:54 -0700
Subject: Re: [openrisc] implementing openrisc in an FPGA for a low-volume product(under 500 units)?
What else do you plan to put into the FPGA?
For the processor alone 300k Xilinx gates is enough. Also depends how you
configure it, if you strip it of caches, MMUs it will get much smaller. Also
you can take away some other stuff, including remove some exceptions you
might now need etc.
I think for your applications you can take Spartan III or equivalent from
Altera. Low cost FPGAs, but still quite big.
regards,
Damjan
----- Original Message -----
From: "Michael M Delaney" <mmdst23+@pitt.edu>
To: <openrisc@o...>
Sent: Wednesday, July 16, 2003 5:18 PM
Subject: [openrisc] implementing openrisc in an FPGA for a low-volume
product(under 500 units)?
> I'm thinking about using an OpenRISC for a project at work(simulator for
> GPS and other shipborne electronic sensors). What FPGAs
> can it be synthisized for? Also, any idea if using it will be ecomical
> to use it in an FPGA for a small production run (I'm guessing about
> 100-250 units, almost defenitly under 500)? My boss never really
mentioned even a rough idea of
> what we're looking for in terms of production cost, but I'd guess under
> $50 or so.
>
> Thanks,
> Mike
>
>
>
|
 |
Browse
