Message

Reply | Reply all

Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

From: paul <paulw@m...>
Date: Sat, 21 Jun 2003 11:56:42 -0700
Subject: [openrisc] or1200 compilation problem

Hi

-- I've commented out (//'define OR1200_XILINX_RAM32X1D ) in 
or1200_defines.v --
Can someone help with this error: (in  or1200_tpram_32x32.v)

@E: or1200_tpram_32x32.v(326): Only one always block may assign a given variable mem @E:"c:\or1200\rtl\verilog\or1200_tpram_32x32.v":326:13:326:16

//
// Generic RAM's registers and wires
//
reg	[dw-1:0]	mem [(1<<aw)-1:0];	// RAM content
reg	[dw-1:0]	do_reg_a;		// RAM data output register
reg	[dw-1:0]	do_reg_b;		// RAM data output register

This is the only error left. 

Reference	Author
[openrisc] setting the stall bit using GDB	Michael
Re: [openrisc] setting the stall bit using GDB	Damjan Lampret