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Message
From: "Damon Brantley" <brantley@m...>
Date: Mon, 21 Apr 2003 23:51:10 -0500
Subject: [openrisc] OpenRisc and ModelSim/Xst
I have been experimenting with openrisc using ModelSim from the Xilinx
webpack.
I have been able to successfully synthesize an openrisc connecting to a
simple vga interface
and run a few simple c programs on it.
I did have to make a few changes to the openrisc code code for things to
work with Model Sim
and Xst.
In or1200_defines.v I added in the following because xst was complaining
about
redefined macros.
`ifdef OR1200_DEFINES
`else
`define OR1200_DEFINES 1
.
.
.
`endif
Also for the small project I have been experimenting with I am using a
300000 gate Spartan and
no external memory and needed the block memory for other things. So I used
the generic registers.
However these never get initialized in running with model sim, so the
registers are stuck with an unknown
value and the simulation goes no where. So I added in the following
initialization code where a generic
register was used in place of a block ram.
integer i;
initial begin
do_reg={dw{1'b0}};
for(i=0;i<(1<<aw);i=i+1)
mem[i]={dw{1'b0}};
end
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