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    Navigation: All forums > Cores > Message List > Message Post

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    From: Richard Herveille<richard@h...>
    Date: Wed Jul 9 17:11:40 CEST 2008
    Subject: [oc] i2c speed - for master core
    Top
    Mode is just a definition here;
    0-100kHz SCL clock: normal
    100kHz-400kHz SCL clock: fast
    400kHz-(3.5MHz) SCL clock: high speed

    For the core there's no difference, just program the divider to achieve the
    desired frequency.
    >From a pad perspective there might be a difference; Phillips specified a
    different pad type for the high speed devices. Although you might achieve
    good results using normal pads.

    Richard


    -----Original Message-----
    From: cores-bounces@o... [mailto:cores-bounces@o...] On
    Behalf Of omer_pessach@l...
    Sent: 09 July 2008 11:13
    To: cores@o...
    Subject: [oc] i2c speed - for master core

    Hi,
    I looked in your i2c master core and according to the spec it is
    supporting all different speeds - normal,fast and high_speed.
    One thing that I did not understand is how changing of speed is done in
    your implementation and how can the user program the master to work
    in each one of the speeds.
    Can you elaborate on this?
    This would help me a lot.
    Thank you,
    omer pessach
    _______________________________________________
    http://www.opencores.org/mailman/listinfo/cores

    ReferenceAuthor
    [oc] i2c speed - for master coreOmer_pessach

     
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