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From: x-opencores.org at andreas-s.net<x-opencores.org@a...>
Date: Mon Jun 25 16:20:09 CEST 2007
Subject: [oc] Problem with T51 core & Xilinx ISE
Hi,

I'm trying to synthesize the T51 core (T8052) with Xilinx ISE on a
Spartan 3-1000. The problem is that the synthesis takes (literally)
hours. I had to stop it after two hours, didn't even get to the place
& route stage.

Is this normal? What I noticed is that the IRAMs are synthesized as
Distributed RAM, not Block RAM, probably because the read address is
not registered. Is that the reason for the long run time?

Some more information in this (german) forum post:
http://www.mikrocontroller.net/topic/72114#new

Thanks in advance,
Andreas

Follow up	Author
[oc] Problem with T51 core & Xilinx ISE	Guy Hutchison