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    Navigation: All forums > Cores > Message List > Message Post

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    From: Wesley J. Landaker<wjl@i...>
    Date: Thu Jan 18 16:39:23 CET 2007
    Subject: [oc] Physical design rules error during mapping with Xilinx8.1i
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    On Wednesday 17 January 2007 20:35, attachment.pgp

    ReferenceAuthor
    [oc] Physical design rules error during mapping with Xilinx8.1iAniket
     
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