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    Navigation: All forums > Cores > Message List > Message Post

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    From: bidnet at free.fr<bidnet@f...>
    Date: Tue Jan 9 21:23:55 CET 2007
    Subject: [oc] ARINC 429 Core
    Top

    ----- Original Message -----
    From: popjeandu at yahoo.com.cn<popjeandu@y...>
    To:
    Date: Tue Jan 9 18:05:02 CET 2007
    Subject: [oc] ARINC 429 Core

    > I want to do a project about ARINC 429 , Now I don't know how to
    > start,I send a email to you as soon as I see the message.Please
    > help me
    > to finish this project . Thanks a lot!
    > regards
    > popjeandu at yahoo.com.cn
    > ----- Original Message -----
    > From: Shehryar Shaheen<shehryar.shaheen at u...>
    > To:
    > Date: Mon Dec 15 13:01:50 CET 2003
    > Subject: [oc] ARINC 429 Core
    > > If there is any student on the mailing list interested in
    > > doing an ARINC 429 Core. Get in touch with me.
    > > ARINC 429 is an avionics data bus protocol in short
    > > You won't get paid anything :)
    > > but you can take it up as a final year project. The core will
    > > be published on Open Cores web site.
    > > PS : In case this core is already available some where and
    > some
    > > one knows a link kindly let me know ( Open source core that is
    > )
    > >
    > >
    >
    > hello,
    you've to precise if you want to implement label filtering, parity
    check, number of ARINC channel, low speed/ high speed, interfaces...
    ARINC 429 is an avionics protocol, so you can't use SRAM FPGA like
    Xilinx or Altera FPGA. I think, Actel only provide flash FPGA.
    And, AFDX is the newer protocol use by boeing and Airbus. ARINC 429
    has 30 years old, so i think AFDX is more attractive for a student.
    I had already developed ARINC 429 cores, so if you want some
    informations...
    Bye

    Follow upAuthor
    回复: Re: [oc] ARINC 429 CoreJean pop

     
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