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Message
From: Colin Bathe<colin.opencores.cores@s...>
Date: Thu Dec 14 17:06:50 CET 2006
Subject: [oc] Quick Start on Opensource FPGA design VLSI Tools
> hi
>
> how we split a clock in to subclock (i.e.divided by 2,3, 4) using VHDL.
If you can't divide a clock by 2 or 4 then you need to go back to reading
VHDL for Dummies as this is very very basic stuff.
Dividing a clock by 3 with a 1 to 2 mark to space ratio is also very easy.
Dividing a clock by 3 with a 1 to 1 mark to space ratio is hard and requires
use of some VHDL Voodoo. Post back here when you have worked out how to do
the easy things and I'll give you some hints on how to this final thing.
Colin.
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