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From: ferrarino<ferrarino82@y...>
Date: Thu Feb 23 13:54:57 CET 2006
Subject: [oc] I2C ip core integration for ALTERA FPGAs

ferrarino wrote:
>
> Hello,
> I have created the avalon bus as Guido told in this post.
> I wanted to know if he used the wrapper to convert the address bus from
> unisgned to standard logic vector.....or not?
> If yes, I have no idea of how to do it....any suggestions?
> After created the avalon bus, have I to use the oc_i2c_master.h function
> to write and read the I2C?
>
> thanks,
> Giuseppe
>

I tried to compile the project but without the wrapper there is an error: a
mismatching between the wb_adr_i of the sopc (std_logic_vector) and the
I2C_master_top (unsigned). So I need this wrapper.......how do I create it?

thanks,
Giuseppe
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Reference	Author
[oc] I2C ip core integration for ALTERA FPGAs	Ferrarino