|
Message
From: Jeff Hanoch<jeff@l...>
Date: Wed Mar 9 20:33:56 CET 2005
Subject: [oc] CAN Controller bug in can_fifo.v
I was using the CAN controller in an FPGA and was seeing some strange
behavior. We would halt the CPU debugger but the activity on the CAN
bus would continue. This filled up the FIFOs in the controller as
expected, but it would get into some strange state where we could not
read correct data.
Upon further logic simulation I narrowed down what I think the problem
is... In the always statement that generates the rd_info_pointer, the
pointer is incremented when release_buffer is high and fifo_empty is
low. I believe that this should be info_empty instead of fifo_empty. I
have changed this and rerun simulations as well as rebuilding the FPGA
and it seems to have fixed the problem.
Here's the code I changed (line 283 of can_fifo.v). What do you think?
// rd_info_pointer
always @ (posedge clk or posedge rst)
begin
if (rst)
rd_info_pointer <= 6'h0;
// else if (release_buffer & (~fifo_empty))
else if (release_buffer & (~info_empty))
rd_info_pointer <=#Tp rd_info_pointer + 1'b1;
end
Thanks,
Jeff
-------------- next part --------------
A non-text attachment was scrubbed...
Name: not available
Type: application/pgp-signature
Size: 189 bytes
Desc: This is a digitally signed message part
Url : attachment.pgp
|
 |
Browse
