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Message
From: nico at seul.org<nico@s...>
Date: Tue Sep 28 13:28:56 CEST 2004
Subject: [oc] Parallel Array Processor Project
> Aloha! > > On EE Times is running an article series about new technology that > engineers > as a collective consider to be interesting. Of these there are a couple > that > should relate pretty well to the things you are looking at for your > parallel > array processor project: > > MathStar - building coarse grained FPGA like chips where the LUTs are > replaced > by something similar to a FSM with routing channels: > > http://www.mathstar.com/ > http://www.eeproductcenter.com/pld-fpga/review/showArticle.jhtml?articleID=21401410 >
its funny to see that's look so much like what we speak about.
> IPFlex a Japanese company that builds a dynamically reconfigurable > processor: > > http://www.ipflex.com/en/index.html > http://www.eeproductcenter.com/pld-fpga/review/showArticle.jhtml?articleID=18902448 >
This one is like the previous plus a cpu onboard. It run at almost 10 time slower... the price will make the difference.
mathstar product seems to be cheaper than FPGA. It should be nice to play with !
> Anyone played with these? > > -- > Med vänlig hälsning, Yours > > Joachim Strömbergson - Alltid i harmonisk svängning. > VP, Research & Development > ---------------------------------------------------------------------- > InformAsic AB / Hugo Grauers gata 5B / SE-411 33 GÖTEBORG / Sweden > Tel: +46 31 68 54 90 Fax: +46 31 68 54 91 Mobile: +46 733 75 97 02 > E-mail: joachim.strombergson@i... Home: www.informasic.com > ---------------------------------------------------------------------- > > > _______________________________________________ > http://www.opencores.org/mailman/listinfo/cores >
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