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Message
From: wjx197733 at emails.bjpu.edu.cn<wjx197733@e...>
Date: Sat Sep 18 14:14:33 CEST 2004
Subject: [oc] again:setup time,hold time,clock skew
What is the function of hold?why clock skew may result in hold time violations if its bad enough? IN a book,I find a word:the delay of combinal logic must be bigger than the width of clock(i.e. the high level of clock) and must be less than the period of clock.and why?
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