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    Navigation: All forums > Cores > Message List > Message Post

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    From: John Sheahan<jrsheahan@o...>
    Date: Thu Sep 9 11:54:17 CEST 2004
    Subject: [oc] hierarchical RTL code to html/block diagram
    Top
    xemacs and vhdl/verilog-mode and speedbar is another alternative.

    Ricky Nite wrote:

    > Hello,
    >
    > Is there a tool to translate existing hierarchical RTL code (multiple
    > levels of module instantiations) to browsable html or block diagram?
    >
    > Im looking at HDLMaker from Polybus, but it seems to require
    > redefining the hierarchy/ module connections using tool-specific
    > *.top files, so I still have to translate the top-level RTL files to
    > *.top files before I can use the html/block-diagram generation feature...
    >
    > help,
    >
    > ricky n.
    >
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