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    From: bporcella<bporcella@s...>
    Date: Thu May 13 18:18:29 CEST 2004
    Subject: [oc] wb_z80
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    As some of you know I have been working on a high performance (pipelined) z80 implementation - wb_z80. The design document has been posted in CVS (wb_z80/doc/z80_spec.doc). The testbench is complete, and initial testing is underway. (Code is maintained in CVS.) The design should start becoming stable in a matter of weeks.

    I'm looking for help in the verification effort. Specifically, hazards are not well tested in the present "instruction" test - and I have not thought much about synthesis. (Are free tools available to complete static timing analysis in ANY target technology?) Judging from the visits to the project page, there is a lot of interest in the core itself. Is anyone interested in helping with verification?

    bj Porcella
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    [oc] Quick Start on Opensource ASIC design VLSI ToolsShehryar Shaheen

     
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