LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Find Resources
  • Job Opportunity
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Cores > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: watchman@l...
    Date: Tue, 29 Jul 2003 12:13:38 +0200
    Subject: Re: [oc] x86 IP Core
    Top

    Aloha!
    
    From: antti@c...  
    
    > x86 Core options: 
    > 
    > 1) cycle accurate clone (real headache) 
    > 2) classical microcode engine (boring) 
    > 3) microcode engine that can reload on the fly - you could achieve 
    > even full pentium 6 support because new microcodes are loadable 
    > (well speed penalty) 
    
    These are important issues. Rudi, do you need to have a cycle accurate
    core, or just instruction order accurate? Also, programmable
    decode/translate might be something to consider. Eats memory but will
    buy you flexibility including incremental development.
    
    /Joachim Strombergson - ASIC hacker at large (as in roaming free)
    
    
    

    Follow upAuthor
    Re: [oc] x86 IP CoreRudolf Usselmann

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.