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Message
From: Shehryar Shaheen <shehryar.shaheen@u...>
Date: Thu, 29 May 2003 22:01:48 +0100
Subject: Re: [oc] Verilog coding style for Open Cores-RTL - Case in point SHA1
----- Original Message -----
From: "Rudolf Usselmann" <rudi@a...>
To: <cores@o...>
Sent: Thursday, May 29, 2003 7:30 PM
Subject: Re: [oc] Verilog coding style for Open Cores-RTL - Case in point
SHA1
> On Thu, 2003-05-29 at 22:51, Shehryar Shaheen wrote:
> > To say SystemC is not a Concurent but a Sequential
> > language is a misleading statement and is perhaps bad
> > understanding of SystemC.
>
> No it is not.
Yes it is
>
> SystemC *is* a sequential language which can be used
> to make concurrent blocks. Actually the language
> is 'C/C++' SystemC is a library of some functions ...
SystemC *is not* a sequential language. C/C++ is a
sequential language
SystemC is a library in C/C++ ( as you rightly pointed out ).
>
>
> > Most simulators are single kernel simulators but in SystemC the
> > kernel is built into the executable binary which gives the
> > concurency similar to the verilog 'always' or the VHDL 'process' block.
> > ....
>
>
> rudi
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>
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