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From: Rudolf Usselmann <rudi@a...>
Date: 30 May 2003 01:30:35 +0700
Subject: Re: [oc] Verilog coding style for Open Cores-RTL - Case in pointSHA1

On Thu, 2003-05-29 at 22:51, Shehryar Shaheen wrote:
> To say SystemC is not a Concurent but a Sequential
>  language is a misleading statement and is perhaps bad
>  understanding of SystemC.

No it is not.

SystemC *is* a sequential language which can be used
to make concurrent blocks. Actually the language
is 'C/C++' SystemC is a library of some functions ...


> Most simulators are single kernel simulators but in SystemC the
>  kernel is built into the executable binary which gives the
>  concurency similar to the verilog 'always' or the VHDL 'process' block.
> ....

 
rudi               
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Reference	Author
Re: [oc] Verilog coding style for Open Cores-RTL - Case in pointSHA1	Marco Antonio Simon Dal Poz
Re: [oc] Verilog coding style for Open Cores-RTL - Case in point SHA1	Marko Mlinar
Re: [oc] Verilog coding style for Open Cores-RTL - Case in point SHA1	Tom Hawkins
Re: [oc] Verilog coding style for Open Cores-RTL - Case in point SHA1	Marko Mlinar
Re: [oc] Verilog coding style for Open Cores-RTL - Case in point SHA1	Shehryar Shaheen

Follow up	Author
Re: [oc] Verilog coding style for Open Cores-RTL - Case in point SHA1	Shehryar Shaheen