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Message
From: Joachim Strömbergson<Joachim.Strombergson@I...>
Date: Wed, 28 May 2003 16:32:16 +0200
Subject: Re: [oc] Verilog coding style for Open Cores-RTL - Case in pointSHA1
Aloha!
Tom Hawkins wrote:
> I agree a multi-function tool is not as useful as a good as a well
> stocked toolbox. This same argument applies to SystemVerilog too --
> they are trying to add verification constructs by borrowing features
> from other languages. A better approach would be to translate
> Verilog into whatever language is convenient for verification: C,
> Java, Perl, Python, etc. Verilator and VTOC already do this for C.
> (Writing this paragraph just convinced me to build a Python generator
> for Confluence. Thanks!)
You're welcome. ;-)
I believe that the stuff added by Co-Design to Verilog in order to create
Superlog were wery whell balanced and well thought out. They really extended
the language and fixed deficits that were highly needed. Also the SYSTEMEX
tool made it very easy to get back to vanilla Verilog.
SystemVerilog extends this even further and there might be stuff there that
makes it look like a complex multi-tool. Hopefully there is enough customer
demand for SystemVerilog to get the EDA vendors to implement it.
But you're right, if the ability to implement newer VHDL- and Verilog version
is an indication, there might take a looong time until the whole design flow
supports at least the synthesisable part of SystemVerilog. There are still
tools out there that don't implement VHDL'93 and support for Verilog-2001 is
quite rare.
In projects I have been part of, there have been mandated rules on what subset
of the RTL language that is allowed to be used. (Oh no Rudi, design rules! ;-)
The reason for this is that more than once, one or two tools used in the flow
have not implemented one feature or the other of the language. Exteremely
conservative RTL is the way to go.
To competsate for the conservatism, Perl, Make and all kinds of other
languages (Confluence woule be a good candidate) are used to generate and
control the RTL.
--
Med vänlig hälsning, Yours
Joachim Strömbergson - Alltid i harmonisk svängning.
VP, Research & Development
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