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From: "Todd Fleming" <todd@f...>
Date: Wed, 21 May 2003 19:07:09 -0500
Subject: Re: [oc] Verilog coding style for Open Cores-RTL - Case in point SHA1

> Something I never understood. Isn't it a conflict of interest
> if the Professor tells his students to buy a book that he wrote ?
> I mean it could be total crap, and nobody would know ....

The students would... The Discrete Mathematics course I took had a double 
whammy. The instructor (not a prof) barely understood the topics and the 
book was horrible. The book was written by prof in the math department. The 
worst part were the schematics; the book used relay "circuits" to 
demonstrate boolean operations. Unfortunately the schematics used non-
standard symbols for relays and the schematics were monopole. Current 
magically flowed from a battery through the relays and into light bulbs 
without returning. To make things even more confusing, the drawings showed 
the relay switch contacts touching the coils.

Todd Fleming
flemingcnc.com

Reference	Author
[oc] Verilog coding style for Open Cores-RTL - Case in point SHA1	Joachim
Re: [oc] Verilog coding style for Open Cores-RTL - Case in pointSHA1	Rudolf Usselmann
Re: [oc] Verilog coding style for Open Cores-RTL - Case in pointSHA1	=?UTF-8?B?Sm9hY2hpbSBTdHLDtm1iZXJnc29u?=
Re: [oc] Verilog coding style for Open Cores-RTL - Case in pointSHA1	Rudolf Usselmann
Re: [oc] Verilog coding style for Open Cores-RTL - Case in pointSHA1	Paul
Re: [oc] Verilog coding style for Open Cores-RTL - Case in pointSHA1	Rudolf Usselmann
Re: [oc] Verilog coding style for Open Cores-RTL - Case in point SHA1	Todd Fleming
Re: [oc] Verilog coding style for Open Cores-RTL - Case in pointSHA1	Rudolf Usselmann