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    Navigation: All forums > Cores > Message List > Message Post

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    From: Andras Ferencz <opencores@f...>
    Date: Wed, 21 May 2003 20:20:02 +0100 (GMT Daylight Time)
    Subject: Language war, was Re: [oc] Verilog coding style ...
    Top

    On Thu, 22 May 2003, Nicolas Boulay wrote:
    
    > Le Mercredi 21 Mai 2003 08:43, Joachim Strömbergson a écrit :
    >
    > > This all means that VHDL does not have industry support, neither from the
    > > major users and the major vendors. That's why Verilog is dominant and will
    > > continue to be.
    >
    > Yes and no.
    > In europe, Infineon (siemens) and ST Microelectronics use VHDL, that's not
    > small compagnies !
    
    Add Alcatel(Stuttgart, Milano, Brussels), Thales, Nokia(Bochum), Philips,
    maybe Lucent and LSI in UK, part of Nortel in UK (ok, Nortel is more
    a Verilog shop, but not exclusively) and so on...
    
    I think the usage is more related to installed base, legacy, etc.
    
    About legacy: nobody will dare to question that PAL is better than NTSC.
    But, US is still NTSC, mainly because you cannot persuade people in US to
    change 200 million TV sets.
    
    Yes, I'm biased towards VHDL, but I have nothing against Verilog,
    there are just some languages (both with ups and downs) to describe
    gates and flops. I'd like to see a language with the good parts of VHDL
    and Verilog. I think a good engineer must know both.
    
    Anyway, I think this whole discussion is pointless, waste of bandwidth, it
    has been discussed so many times without any result.
    
    Cheers,
      Andras
    
    
    
    
    

    ReferenceAuthor
    Re: [oc] Verilog coding style for Open Cores-RTL - Case in pointSHA1Marco Antonio Simon Dal Poz
    Re: [oc] Verilog coding style for Open Cores-RTL - Case in pointSHA1Joachim
    Re: [oc] Verilog coding style for Open Cores-RTL - Case in point SHA1Nicolas Boulay

    Follow upAuthor
    Re: Language war, was Re: [oc] Verilog coding style ...Niclas Hedhman

     
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