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From: Matthias Fuchs <matthias.fuchs@e...>
Date: Fri, 04 Apr 2003 10:58:15 +0200
Subject: Re: [oc] UART16550 core

Hi Carl,

I found your posting in the opencores mailing list. What happened to your VHDL 16550 core?
Did you post it some time? Well, I am very interested in a 16550 core written in vhdl.
Are there any plan to make your code freely available?

Regards
Matthias

Carl van Schaik wrote:
> Hi
> 
> I checked through the uart16550 code, looks like it needs a few changes.
> I have writen a VHDL 16550 uart that I was going to post up along with
> the Verilog version. It is currently working on my board so at least I know
> for sure that part of it works :-)  I just need to implement modem control
> lines (or any volunteers?, should be easy) and get around to posting it.
> 
> regards
> Carl van Schaik
> --
> Embedded Engineer
> OpenFuel Pty Ltd.
> 
> 
>>Hi, Guys and girls (if any).
>>
>>I would like to know if anybody tested the UART16550 core so far.
>>If any body implemented the core, run it on a board, etc...
>>
>>I want to help verifying the core.
>>
>>Regards,
>>Igor
>>--
>>To unsubscribe from cores mailing list please visit
> 
> http://www.opencores.org/mailinglists.shtml
> 
> 
> 
> 
> 


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                             _/_/_/_/   Matthias Fuchs
                            _/_/_/_/   Dipl.-Ing.
                           _/_/_/_/   matthias.fuchs@e...

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