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Design and Implementation of a 50MHZ DXT CoProcessor
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by Reza Ebrahimi Atani on 16-Sep-2007
source: http://csdl2.computer.org/persagen/DLAbsToc.jsp?resourcePath=/dl/proceedings/&toc=comp/proceedings/dsd/2007/2978/00/2978toc.xml&DOI=10.1109/DSD.2007.43
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Frequency analysis using the DFT, the DHT, the DCT or the DST is an obvious choice for signal processing domain. This paper describes the implementation of a DXT coprocessor of transform length '8' for the synchronous design in a 0.22 LM Flash-based FPGA device (ACTEL). The total dynamic power of 359.24 mW, with an operating frequency of 50 MHz and an operating voltage of 2.5 V is achieved. The paper presents the trade-offs involved in designing the architecture, the design for performance issues and the possibilities for future development.
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