Simple FM Receiver :: Overview
Project maintainers
Details
Name: simple_fm_receiver
Created: Jan 3, 2005
Updated: Aug 10, 2008
SVN: Browse
Statistics: View
Other project properties
Category: Other
Language: VHDL
Development status: Stable
Additional info:
FPGA proven,
WishBone Compliant: No
License: GPL
Simple FM Receiver
Simple implementation of FM Receiver to demodulate square wave signal modulated
in FM. This design uses PLL to demodulate FM modulated signal.
Features
- Synthesizable
- This design can be synthesize using Xilinx 6.3i
- This design also can be synthesize using http://asim.lip6.fr/recherche/alliance/ (Alliance 5.0) not fully tested.
- Simple
- Use it to understand PLL to see how FM Receiver works.
- Good for introduction in design process.
- Modular design, can be use for other design.