Zet - The x86 (IA-32) open implementation :: Overview
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Details
Name: zet86
Created: Jul 3, 2008
Updated: Jun 29, 2009
SVN: Browse
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Other project properties
Category: Processor
Language: Verilog
Development status: Alpha
Additional info:
FPGA proven,
WishBone Compliant: Yes
License: GPL
Description
The Zet SoC PC platform and processor is an open implementation of the so widely used x86 architecture. This project is being developed using the Xilinx ML-403 and Altera DE1 boards. Currently it's in a very early stage of development and only the 16 bit part is supported. The official website for the project is: zet.aluzina.org. Some features of the Zet SoC PC system include:
- 16 bit Zet processor equivalent to an Intel 80186, running at 25 Mhz (Wishbone compatible)
- Wishbone ZBT SRAM memory controller addressing 1 Mb of low memory
- Wishbone flash memory controller for BIOS storage (ROM BIOS and VIDEO BIOS)
- Video Display Unit in text mode only displaying 80x25 characters
- 8253 simple timer, sending interrupts each 18.2 Hz via IRQ 0
- 8042 keyboard controller sending PC/XT scancodes via IRQ 1
- UART support as COM1, using IRQ 4
- Very simple interrupt controller.
- Flash memory controller for floppy disk storage
- Compact Flash card controller for hard disk emulation with full read/write support
- SD card controller for hard disk emulation with full read/write support
- GPL implementation of a PC BIOS with several services implemented: interrupts 8h, 9h, 10h, 11h, 12h, 13h, 16h, 18h, 19h, 1Ah, 1Ch
- Main project page
- Some pictures of the system
- Discussion forums
- Installation guides for the Xilinx ML403 and Altera DE1
- Source code of the Zet system v0.6.1 (in tar.bz2 format)
- Source code of the Zet system v0.6.1 (in zip format)
- GIT development tree: git://zet.aluzina.org/zet.git
News
- 1-May-2009. Version 0.6.1 released. This is a bugfix release, as version 0.6.0 had some problems with the VGA - CPU timings. Now the two clock domains have been separated by two sync flip-flops in both directions. Some other minor bugfixes have been corrected too.
- 30-Apr-2009. Version 0.6.0 released. This is a big release, as we introduce read/write support for the SD card in the Altera DE1 board, Expanded Memory support version 3.2 and a serial UART controller acting as COM1, using IRQ 4. Read the forums news for more details.
21-Apr-2009. Version 0.5.2 released. This is a mainteinance release for the Altera DE1 board. The SRAM has been restructured to be used only as video RAM for future development of the VGA graphics modes. Some other compilation bugfixes and improvements have also been addressed.